diff options
| author | K. Y. Srinivasan | 2017-01-19 11:51:58 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2017-01-20 14:52:49 +0100 |
| commit | 37e11d5c7052a5ca55ef807731c75218ea341b4c (patch) | |
| tree | 80bcc0ee8587d3c280b1f0b0235be3dc3feb302e /drivers/hv | |
| parent | 7297ff0ca9db7e2d830841035b95d8b94b529142 (diff) | |
Drivers: hv: vmbus: Define an APIs to manage interrupt state
As part of cleaning up architecture specific code, define APIs
to manage interrupt state.
Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hv')
| -rw-r--r-- | drivers/hv/hv.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c index 945719026223..60594fa3250d 100644 --- a/drivers/hv/hv.c +++ b/drivers/hv/hv.c @@ -284,14 +284,16 @@ int hv_synic_init(unsigned int cpu) hv_set_siefp(siefp.as_uint64); /* Setup the shared SINT. */ - rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); + hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, + shared_sint.as_uint64); shared_sint.as_uint64 = 0; shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR; shared_sint.masked = false; shared_sint.auto_eoi = true; - wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); + hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, + shared_sint.as_uint64); /* Enable the global synic bit */ hv_get_synic_state(sctrl.as_uint64); @@ -384,13 +386,15 @@ int hv_synic_cleanup(unsigned int cpu) hv_ce_shutdown(hv_context.clk_evt[cpu]); } - rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); + hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, + shared_sint.as_uint64); shared_sint.masked = 1; /* Need to correctly cleanup in the case of SMP!!! */ /* Disable the interrupt */ - wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); + hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, + shared_sint.as_uint64); hv_get_simp(simp.as_uint64); simp.simp_enabled = 0; |