diff options
author | Przemyslaw Gaj | 2019-04-16 09:36:14 +0100 |
---|---|---|
committer | Boris Brezillon | 2019-05-28 09:39:53 +0200 |
commit | 88c50322449a4dea8687ed155968d19cfc763393 (patch) | |
tree | ac3e59e2c53670b035f7e5b9edff48b35eaf25cd /drivers/i3c/master.c | |
parent | a188339ca5a396acc588e5851ed7e19f66b0ebd9 (diff) |
i3c: Drop support for I2C 10 bit addresing
This patch drops support for I2C devices with 10 bit addressing. When I2C
device with 10 bit address is defined in DT, I3C master registration fails.
Address space for I2C devices has been reduced and ->i2c_funcs() hook has been
removed.
Because this patch series dropped support for 10 bit I2C devices, support is
also dropped in Cadence I3C master driver and Synopsys DesignWare I3C master
driver.
Signed-off-by: Przemyslaw Gaj <pgaj@cadence.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Diffstat (limited to 'drivers/i3c/master.c')
-rw-r--r-- | drivers/i3c/master.c | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 5f4bd52121fe..b9d2b88928e1 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -1963,6 +1963,16 @@ of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, if (ret) return ret; + /* + * The I3C Specification does not clearly say I2C devices with 10-bit + * address are supported. These devices can't be passed properly through + * DEFSLVS command. + */ + if (boardinfo->base.flags & I2C_CLIENT_TEN) { + dev_err(&master->dev, "I2C device with 10 bit address not supported."); + return -ENOTSUPP; + } + /* LVR is encoded in reg[2]. */ boardinfo->lvr = reg[2]; @@ -2111,16 +2121,14 @@ static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, return ret ? ret : nxfers; } -static u32 i3c_master_i2c_functionalities(struct i2c_adapter *adap) +static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) { - struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); - - return master->ops->i2c_funcs(master); + return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; } static const struct i2c_algorithm i3c_master_i2c_algo = { .master_xfer = i3c_master_i2c_adapter_xfer, - .functionality = i3c_master_i2c_functionalities, + .functionality = i3c_master_i2c_funcs, }; static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) @@ -2379,8 +2387,7 @@ EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) { if (!ops || !ops->bus_init || !ops->priv_xfers || - !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers || - !ops->i2c_funcs) + !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) return -EINVAL; if (ops->request_ibi && |