diff options
| author | Martin Blumenstingl | 2017-10-31 21:01:47 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2018-01-08 16:03:42 +0100 |
| commit | ab569a4c55422c9fb123e9ce8bffd44198724c51 (patch) | |
| tree | d9a0cb398208a94725ef84818e967b19c50e12f9 /drivers/iio/trigger/iio-trig-hrtimer.c | |
| parent | fda29dbac9e6604f8eeb660953a2bef360514dc7 (diff) | |
iio: adc: meson-saradc: program the channel muxes during initialization
On some Meson8 devices the channel muxes are not programmed. This
results in garbage values when trying to read channels that are not set
up.
Fix this by initializing the channel 0 and 1 muxes in
MESON_SAR_ADC_CHAN_10_SW as well as the muxes for all other channels in
MESON_SAR_ADC_AUX_SW based on what the vendor driver does (which is
simply a 1:1 mapping of channel number and channel mux).
This only showed up on Meson8 devices, because for GXBB and newer BL30
is taking care of initializing the channel muxes.
This additionally fixes a typo in the
MESON_SAR_ADC_AUX_SW_MUX_SEL_CHAN_MASK macro because the old definition
assumed that the register fields were 2 bit wide, while they are
actually 3 bit wide.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/iio/trigger/iio-trig-hrtimer.c')
0 files changed, 0 insertions, 0 deletions