diff options
| author | Satoshi Nagahama | 2016-05-06 16:35:05 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab | 2016-05-06 23:51:47 -0300 |
| commit | ab4d14528fdf946dfa7177b53e64f78bf8cce03a (patch) | |
| tree | d6a3d2f5b058bcb1a148cb0b6d20dce7742312b5 /drivers/media/tuners/qm1d1c0042.c | |
| parent | 7977a15ede1d2d95446ff26a9e34a7b16c0fd12f (diff) | |
[media] em28xx: add support for PLEX PX-BCUD (ISDB-S)
PX-BCUD has the following components:
USB interface: Empia EM28178
Demodulator: Toshiba TC90532 (works by code for TC90522)
Tuner: Next version of Sharp QM1D1C0042
em28xx_dvb_init(): add init code for PLEX PX-BCUD with calling
px_bcud_init() that does things like pin configuration.
qm1d1c0042_init(): support the next version of QM1D1C0042, change to
choose an appropriate array of initial registers by reading chip id.
[mchehab@osg.samsung.com: fold a fixup patch and fix checkpatch.pl
errors/warnings, where applicable]
Signed-off-by: Satoshi Nagahama <sattnag@aim.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media/tuners/qm1d1c0042.c')
| -rw-r--r-- | drivers/media/tuners/qm1d1c0042.c | 38 |
1 files changed, 27 insertions, 11 deletions
diff --git a/drivers/media/tuners/qm1d1c0042.c b/drivers/media/tuners/qm1d1c0042.c index 18bc745ed108..9af2a155cfca 100644 --- a/drivers/media/tuners/qm1d1c0042.c +++ b/drivers/media/tuners/qm1d1c0042.c @@ -32,14 +32,24 @@ #include "qm1d1c0042.h" #define QM1D1C0042_NUM_REGS 0x20 - -static const u8 reg_initval[QM1D1C0042_NUM_REGS] = { - 0x48, 0x1c, 0xa0, 0x10, 0xbc, 0xc5, 0x20, 0x33, - 0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0xff, 0xf3, 0x00, 0x2a, 0x64, 0xa6, 0x86, - 0x8c, 0xcf, 0xb8, 0xf1, 0xa8, 0xf2, 0x89, 0x00 +#define QM1D1C0042_NUM_REG_ROWS 2 + +static const u8 +reg_initval[QM1D1C0042_NUM_REG_ROWS][QM1D1C0042_NUM_REGS] = { { + 0x48, 0x1c, 0xa0, 0x10, 0xbc, 0xc5, 0x20, 0x33, + 0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x00, 0xff, 0xf3, 0x00, 0x2a, 0x64, 0xa6, 0x86, + 0x8c, 0xcf, 0xb8, 0xf1, 0xa8, 0xf2, 0x89, 0x00 + }, { + 0x68, 0x1c, 0xc0, 0x10, 0xbc, 0xc1, 0x11, 0x33, + 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x00, 0xff, 0xf3, 0x00, 0x3f, 0x25, 0x5c, 0xd6, + 0x55, 0xcf, 0x95, 0xf6, 0x36, 0xf2, 0x09, 0x00 + } }; +static int reg_index; + static const struct qm1d1c0042_config default_cfg = { .xtal_freq = 16000, .lpf = 1, @@ -320,7 +330,6 @@ static int qm1d1c0042_init(struct dvb_frontend *fe) int i, ret; state = fe->tuner_priv; - memcpy(state->regs, reg_initval, sizeof(reg_initval)); reg_write(state, 0x01, 0x0c); reg_write(state, 0x01, 0x0c); @@ -330,15 +339,22 @@ static int qm1d1c0042_init(struct dvb_frontend *fe) goto failed; usleep_range(2000, 3000); - val = state->regs[0x01] | 0x10; - ret = reg_write(state, 0x01, val); /* soft reset off */ + ret = reg_write(state, 0x01, 0x1c); /* soft reset off */ if (ret < 0) goto failed; - /* check ID */ + /* check ID and choose initial registers corresponding ID */ ret = reg_read(state, 0x00, &val); - if (ret < 0 || val != 0x48) + if (ret < 0) + goto failed; + for (reg_index = 0; reg_index < QM1D1C0042_NUM_REG_ROWS; + reg_index++) { + if (val == reg_initval[reg_index][0x00]) + break; + } + if (reg_index >= QM1D1C0042_NUM_REG_ROWS) goto failed; + memcpy(state->regs, reg_initval[reg_index], QM1D1C0042_NUM_REGS); usleep_range(2000, 3000); state->regs[0x0c] |= 0x40; |