diff options
| author | Cong Dang | 2022-10-12 16:01:51 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2022-12-31 13:31:48 +0100 |
| commit | f3107fca5491a3a8a80fe402a34a6a77482acf95 (patch) | |
| tree | 23af31a5f5193ef648ba2e32bd4354fbeaa08a33 /drivers/memory | |
| parent | 85c570c3b33db4f82f320b14ab9d666e9e292fb3 (diff) | |
memory: renesas-rpc-if: Clear HS bit during hardware initialization
[ Upstream commit 5192481f908e576be42bd39ec12979b79e11f7e0 ]
According to the datasheet, HS bit should be specified to 1 when using
DMA transfer. As DMA transfer is not supported, it should be cleared to
0.
Previously, the driver relied on the HS bit being cleared by prior
firmware but this is not always the case.
Fix this by ensuring the bit is cleared during hardware initialization.
Fixes: ca7d8b980b67 ("memory: add Renesas RPC-IF driver")
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/08d9fb10b3051decebf871267a6e2e7cb2d4faf9.1665583089.git.geert+renesas@glider.be
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/memory')
| -rw-r--r-- | drivers/memory/renesas-rpc-if.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/memory/renesas-rpc-if.c b/drivers/memory/renesas-rpc-if.c index 4316988d791a..61c288d40375 100644 --- a/drivers/memory/renesas-rpc-if.c +++ b/drivers/memory/renesas-rpc-if.c @@ -317,6 +317,9 @@ int rpcif_hw_init(struct rpcif *rpc, bool hyperflash) regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_PHYMEM_MASK, RPCIF_PHYCNT_PHYMEM(hyperflash ? 3 : 0)); + /* DMA Transfer is not supported */ + regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_HS, 0); + if (rpc->type == RPCIF_RCAR_GEN3) regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_STRTIM(7), RPCIF_PHYCNT_STRTIM(7)); |