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authorAneesh Kumar K.V2016-04-20 03:59:47 -0400
committerMichael Ellerman2016-04-26 21:06:36 +1000
commit3b1dbfa14f97188ec33fdfc7acb66bea59a3bb21 (patch)
treeaed4c2b33cd4e481238d6cfa2a2dbe4446cf50d6 /drivers/misc/cxl
parent4aec6ec0da9c72c0fa1a5b0d1133707481347bb3 (diff)
cxl: Fix DAR check & use REGION_ID instead of opencoding
The current code will set _PAGE_USER to the access flags for any fault address, because the ~ operation will be true for all address we take a fault on. But setting _PAGE_USER also means that the fault will be handled only if the page table have _PAGE_USER set. Hence there is no security hole with the current code. Now if it is an user space access, then the change in this patch really don't have an impact because we have (!ctx->kernel) set true and we take the if condition true. Now kernel context created fault on an address in the kernel range will result in a fault loop because we will not insert the hash pte due to access and pte permission mismatch. This patch fix the above issue. Fixes: f204e0b8cedd ("cxl: Driver code for powernv PCIe based cards for userspace access") Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Acked-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc/cxl')
-rw-r--r--drivers/misc/cxl/fault.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/misc/cxl/fault.c b/drivers/misc/cxl/fault.c
index 9a8650bcb042..9a236543da23 100644
--- a/drivers/misc/cxl/fault.c
+++ b/drivers/misc/cxl/fault.c
@@ -152,7 +152,7 @@ static void cxl_handle_page_fault(struct cxl_context *ctx,
access = _PAGE_PRESENT;
if (dsisr & CXL_PSL_DSISR_An_S)
access |= _PAGE_RW;
- if ((!ctx->kernel) || ~(dar & (1ULL << 63)))
+ if ((!ctx->kernel) || (REGION_ID(dar) == USER_REGION_ID))
access |= _PAGE_USER;
if (dsisr & DSISR_NOHPTE)