diff options
author | Oded Gabbay | 2020-03-28 12:00:07 +0300 |
---|---|---|
committer | Oded Gabbay | 2020-05-17 12:06:22 +0300 |
commit | c8aee597bbe2eb7458376cc1116ea4e5a3537764 (patch) | |
tree | 0ac86ff71e26a62371195db9e1547a82e3f01c4d /drivers/misc | |
parent | 7a65ee046b2238e053f6ebb610e1a082cfc49490 (diff) |
habanalabs: update firmware definitions
Add comments for the various errors and states of the firmware during boot.
Add a mapping of a new register that will tell the driver whether the
firmware executed the request from the driver or if it has encountered an
error.
Add a new enum for the possible values of this register.
Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Diffstat (limited to 'drivers/misc')
-rw-r--r-- | drivers/misc/habanalabs/include/goya/goya_reg_map.h | 1 | ||||
-rw-r--r-- | drivers/misc/habanalabs/include/hl_boot_if.h | 51 |
2 files changed, 49 insertions, 3 deletions
diff --git a/drivers/misc/habanalabs/include/goya/goya_reg_map.h b/drivers/misc/habanalabs/include/goya/goya_reg_map.h index 08061282cd9c..844a6ff5929a 100644 --- a/drivers/misc/habanalabs/include/goya/goya_reg_map.h +++ b/drivers/misc/habanalabs/include/goya/goya_reg_map.h @@ -22,6 +22,7 @@ #define mmCPU_CQ_BASE_ADDR_LOW mmPSOC_GLOBAL_CONF_SCRATCHPAD_8 #define mmCPU_CQ_BASE_ADDR_HIGH mmPSOC_GLOBAL_CONF_SCRATCHPAD_9 #define mmCPU_CQ_LENGTH mmPSOC_GLOBAL_CONF_SCRATCHPAD_10 +#define mmCPU_CMD_STATUS_TO_HOST mmPSOC_GLOBAL_CONF_SCRATCHPAD_23 #define mmCPU_BOOT_ERR0 mmPSOC_GLOBAL_CONF_SCRATCHPAD_24 #define mmCPU_BOOT_ERR1 mmPSOC_GLOBAL_CONF_SCRATCHPAD_25 #define mmUPD_STS mmPSOC_GLOBAL_CONF_SCRATCHPAD_26 diff --git a/drivers/misc/habanalabs/include/hl_boot_if.h b/drivers/misc/habanalabs/include/hl_boot_if.h index 107482fb45a4..660550604362 100644 --- a/drivers/misc/habanalabs/include/hl_boot_if.h +++ b/drivers/misc/habanalabs/include/hl_boot_if.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 * - * Copyright 2018 HabanaLabs, Ltd. + * Copyright 2018-2020 HabanaLabs, Ltd. * All Rights Reserved. * */ @@ -10,7 +10,43 @@ #define LKD_HARD_RESET_MAGIC 0xED7BD694 -/* CPU error bits in BOOT_ERROR registers */ +/* + * CPU error bits in BOOT_ERROR registers + * + * CPU_BOOT_ERR0_DRAM_INIT_FAIL DRAM initialization failed. + * DRAM is not reliable to use. + * + * CPU_BOOT_ERR0_FIT_CORRUPTED FIT data integrity verification of the + * image provided by the host has failed. + * + * CPU_BOOT_ERR0_TS_INIT_FAIL Thermal Sensor initialization failed. + * Boot continues as usual, but keep in + * mind this is a warning. + * + * CPU_BOOT_ERR0_DRAM_SKIPPED DRAM initialization has been skipped. + * Skipping DRAM initialization has been + * requested (e.g. strap, command, etc.) + * and FW skipped the DRAM initialization. + * Host can initialize the DRAM. + * + * CPU_BOOT_ERR0_BMC_WAIT_SKIPPED Waiting for BMC data will be skipped. + * Meaning the BMC data might not be + * available until reset. + * + * CPU_BOOT_ERR0_NIC_DATA_NOT_RDY NIC data from BMC is not ready. + * BMC has not provided the NIC data yet. + * Once provided this bit will be cleared. + * + * CPU_BOOT_ERR0_NIC_FW_FAIL NIC FW loading failed. + * The NIC FW loading and initialization + * failed. This means NICs are not usable. + * + * CPU_BOOT_ERR0_ENABLED Error registers enabled. + * This is a main indication that the + * running FW populates the error + * registers. Meaning the error bits are + * not garbage, but actual error statuses. + */ #define CPU_BOOT_ERR0_DRAM_INIT_FAIL (1 << 0) #define CPU_BOOT_ERR0_FIT_CORRUPTED (1 << 1) #define CPU_BOOT_ERR0_TS_INIT_FAIL (1 << 2) @@ -27,15 +63,18 @@ enum cpu_boot_status { CPU_BOOT_STATUS_SRAM_AVAIL = 3, CPU_BOOT_STATUS_IN_BTL = 4, /* BTL is H/W FSM */ CPU_BOOT_STATUS_IN_PREBOOT = 5, - CPU_BOOT_STATUS_IN_SPL = 6, + CPU_BOOT_STATUS_IN_SPL, /* deprecated - not reported */ CPU_BOOT_STATUS_IN_UBOOT = 7, CPU_BOOT_STATUS_DRAM_INIT_FAIL, /* deprecated - will be removed */ CPU_BOOT_STATUS_FIT_CORRUPTED, /* deprecated - will be removed */ + /* U-Boot console prompt activated, commands are not processed */ CPU_BOOT_STATUS_UBOOT_NOT_READY = 10, + /* Finished NICs init, reported after DRAM and NICs */ CPU_BOOT_STATUS_NIC_FW_RDY = 11, CPU_BOOT_STATUS_TS_INIT_FAIL, /* deprecated - will be removed */ CPU_BOOT_STATUS_DRAM_SKIPPED, /* deprecated - will be removed */ CPU_BOOT_STATUS_BMC_WAITING_SKIPPED, /* deprecated - will be removed */ + /* Last boot loader progress status, ready to receive commands */ CPU_BOOT_STATUS_READY_TO_BOOT = 15, }; @@ -46,4 +85,10 @@ enum kmd_msg { KMD_MSG_SKIP_BMC, }; +enum cpu_msg_status { + CPU_MSG_CLR = 0, + CPU_MSG_OK, + CPU_MSG_ERR, +}; + #endif /* HL_BOOT_IF_H */ |