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authorRafał Miłecki2016-04-22 13:23:13 +0200
committerBoris Brezillon2016-05-05 23:55:14 +0200
commitba4f46b28f87396d3270d05d8d0e08467471b7fb (patch)
tree09a1a2c22d26e24367bb35cea61bb014a7137047 /drivers/mtd/nand
parente4225ae8234cf5548c38dc887b233ad1d45b4d53 (diff)
mtd: nand: add support for "nand-ecc-algo" DT property
So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/nand_base.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c9d6230eab08..c26f1852787b 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -4003,17 +4003,23 @@ static int of_get_nand_ecc_mode(struct device_node *np)
return -ENODEV;
}
+static const char * const nand_ecc_algos[] = {
+ [NAND_ECC_HAMMING] = "hamming",
+ [NAND_ECC_BCH] = "bch",
+};
+
static int of_get_nand_ecc_algo(struct device_node *np)
{
const char *pm;
- int err;
+ int err, i;
- /*
- * TODO: Read ECC algo OF property and map it to enum nand_ecc_algo.
- * It's not implemented yet as currently NAND subsystem ignores
- * algorithm explicitly set this way. Once it's handled we should
- * document & support new property.
- */
+ err = of_property_read_string(np, "nand-ecc-algo", &pm);
+ if (!err) {
+ for (i = NAND_ECC_HAMMING; i < ARRAY_SIZE(nand_ecc_algos); i++)
+ if (!strcasecmp(pm, nand_ecc_algos[i]))
+ return i;
+ return -ENODEV;
+ }
/*
* For backward compatibility we also read "nand-ecc-mode" checking