mxc_nand: cleanup eccoob descriptions

The original Freescale driver used to have eccoob descriptions like
this:

static struct nand_ecclayout nand_hw_eccoob_8 = {
	.eccbytes = 5,
	.eccpos = {6, 7, 8, 9, 10},
	.oobfree = {{0, 5}, {11, 5}}
};

static struct nand_ecclayout nand_hw_eccoob_16 = {
	.eccbytes = 5,
	.eccpos = {6, 7, 8, 9, 10},
	.oobfree = {{0, 6}, {12, 4}}
};

The former was used for 8bit flashes and the latter for 16bit flashes.
They honored the fact that the bad block marker on 8bit flashes is on byte 5
while on 16bit flashes it is on byte 11.
In the Kernel driver this was copied wrong and we ended up with two identical
descriptions.

Change it so that we have only one description which leaves byte 5 and byte
11 unspecified so that it won't be used by others.

Also, rename the descriptions to nand_hw_eccoob_smallpage and
nand_hw_eccoob_largepage so that it can't be confused with Nand chip bus
widths (what actually happened in this driver)

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 9 insertions, 15 deletions

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 06c531485df9..2aae5a7ddbd1 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -129,19 +129,13 @@ struct mxc_nand_host {
 #define SPARE_SINGLEBIT_ERROR 0x1
 
 /* OOB placement block for use with hardware ecc generation */
-static struct nand_ecclayout nand_hw_eccoob_8 = {
+static struct nand_ecclayout nand_hw_eccoob_smallpage = {
 	.eccbytes = 5,
 	.eccpos = {6, 7, 8, 9, 10},
-	.oobfree = {{0, 5}, {11, 5}, }
+	.oobfree = {{0, 5}, {12, 4}, }
 };
 
-static struct nand_ecclayout nand_hw_eccoob_16 = {
-	.eccbytes = 5,
-	.eccpos = {6, 7, 8, 9, 10},
-	.oobfree = {{0, 5}, {11, 5}, }
-};
-
-static struct nand_ecclayout nand_hw_eccoob_64 = {
+static struct nand_ecclayout nand_hw_eccoob_largepage = {
 	.eccbytes = 20,
 	.eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26,
 		   38, 39, 40, 41, 42, 54, 55, 56, 57, 58},
@@ -940,7 +934,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
 	} else {
 		this->ecc.size = 512;
 		this->ecc.bytes = 3;
-		this->ecc.layout = &nand_hw_eccoob_8;
+		this->ecc.layout = &nand_hw_eccoob_smallpage;
 		this->ecc.mode = NAND_ECC_SOFT;
 		tmp = readw(host->regs + NFC_CONFIG1);
 		tmp &= ~NFC_ECC_EN;
@@ -964,7 +958,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
 	/* NAND bus width determines access funtions used by upper layer */
 	if (pdata->width == 2) {
 		this->options |= NAND_BUSWIDTH_16;
-		this->ecc.layout = &nand_hw_eccoob_16;
+		this->ecc.layout = &nand_hw_eccoob_smallpage;
 	}
 
 	/* first scan to find the device and get the page size */
@@ -978,20 +972,20 @@ static int __init mxcnd_probe(struct platform_device *pdev)
 	if (this->ecc.mode == NAND_ECC_HW) {
 		switch (mtd->oobsize) {
 		case 8:
-			this->ecc.layout = &nand_hw_eccoob_8;
+			this->ecc.layout = &nand_hw_eccoob_smallpage;
 			break;
 		case 16:
-			this->ecc.layout = &nand_hw_eccoob_16;
+			this->ecc.layout = &nand_hw_eccoob_smallpage;
 			break;
 		case 64:
-			this->ecc.layout = &nand_hw_eccoob_64;
+			this->ecc.layout = &nand_hw_eccoob_largepage;
 			break;
 		default:
 			/* page size not handled by HW ECC */
 			/* switching back to soft ECC */
 			this->ecc.size = 512;
 			this->ecc.bytes = 3;
-			this->ecc.layout = &nand_hw_eccoob_8;
+			this->ecc.layout = &nand_hw_eccoob_smallpage;
 			this->ecc.mode = NAND_ECC_SOFT;
 			this->ecc.calculate = NULL;
 			this->ecc.correct = NULL;