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authorRussell King (Oracle)2021-11-17 16:46:31 +0000
committerDavid S. Miller2021-11-18 11:36:48 +0000
commitc8fa4bac30e1ca4b0213f85fd868d0f14545d4c7 (patch)
tree1d9280d8ca6abda0b0b6494aeeb4a4e92ec62ae7 /drivers/net/ethernet/atheros
parent5e20a8aa48a0c32dad6165b26d5030a6131a25ed (diff)
net: ag71xx: use phylink_generic_validate()
ag71xx apparently only supports MII port type, which makes it different from other implementations. However, Oleksij says there is no special reason for this. Convert the driver to use phylink_generic_validate(), which will allow all ethtool port linkmodes instead of only MII, giving the driver consistent behaviour with other drivers. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/atheros')
-rw-r--r--drivers/net/ethernet/atheros/ag71xx.c31
1 files changed, 3 insertions, 28 deletions
diff --git a/drivers/net/ethernet/atheros/ag71xx.c b/drivers/net/ethernet/atheros/ag71xx.c
index d3e7af2db3b9..ff924f06581e 100644
--- a/drivers/net/ethernet/atheros/ag71xx.c
+++ b/drivers/net/ethernet/atheros/ag71xx.c
@@ -1024,33 +1024,6 @@ static void ag71xx_mac_config(struct phylink_config *config, unsigned int mode,
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]);
}
-static void ag71xx_mac_validate(struct phylink_config *config,
- unsigned long *supported,
- struct phylink_link_state *state)
-{
- __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
-
- phylink_set(mask, MII);
-
- phylink_set(mask, Pause);
- phylink_set(mask, Asym_Pause);
- phylink_set(mask, Autoneg);
- phylink_set(mask, 10baseT_Half);
- phylink_set(mask, 10baseT_Full);
- phylink_set(mask, 100baseT_Half);
- phylink_set(mask, 100baseT_Full);
-
- if (state->interface == PHY_INTERFACE_MODE_SGMII ||
- state->interface == PHY_INTERFACE_MODE_RGMII ||
- state->interface == PHY_INTERFACE_MODE_GMII) {
- phylink_set(mask, 1000baseT_Full);
- phylink_set(mask, 1000baseX_Full);
- }
-
- linkmode_and(supported, supported, mask);
- linkmode_and(state->advertising, state->advertising, mask);
-}
-
static void ag71xx_mac_pcs_get_state(struct phylink_config *config,
struct phylink_link_state *state)
{
@@ -1124,7 +1097,7 @@ static void ag71xx_mac_link_up(struct phylink_config *config,
}
static const struct phylink_mac_ops ag71xx_phylink_mac_ops = {
- .validate = ag71xx_mac_validate,
+ .validate = phylink_generic_validate,
.mac_pcs_get_state = ag71xx_mac_pcs_get_state,
.mac_an_restart = ag71xx_mac_an_restart,
.mac_config = ag71xx_mac_config,
@@ -1138,6 +1111,8 @@ static int ag71xx_phylink_setup(struct ag71xx *ag)
ag->phylink_config.dev = &ag->ndev->dev;
ag->phylink_config.type = PHYLINK_NETDEV;
+ ag->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE |
+ MAC_10 | MAC_100 | MAC_1000FD;
if ((ag71xx_is(ag, AR9330) && ag->mac_idx == 0) ||
ag71xx_is(ag, AR9340) ||