diff options
author | Wu, Bryan | 2007-05-06 14:50:32 -0700 |
---|---|---|
committer | Linus Torvalds | 2007-05-07 12:12:58 -0700 |
commit | 0851a2848cfd40012063ca9cf86fb67b7bebceff (patch) | |
tree | 844bc5365faef4ee126970e233c7894e9a7a56a8 /drivers/net | |
parent | 194de5612777a9ff4f96dae1932f77a5a89e5f0a (diff) |
Blackfin: add blackfin support in smc91x ethernet controller driver
As SMC91X ethernet controller are used in blackfin STAMP 533 development
board, this patch add blackfin support to the smc91x linux driver.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/Kconfig | 2 | ||||
-rw-r--r-- | drivers/net/smc91x.h | 47 |
2 files changed, 48 insertions, 1 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 9e6933a5088e..279ec625cec4 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -822,7 +822,7 @@ config SMC91X tristate "SMC 91C9x/91C1xxx support" select CRC32 select MII - depends on NET_ETHERNET && (ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00) + depends on NET_ETHERNET && (ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00 || BFIN) help This is a driver for SMC's 91x series of Ethernet chipsets, including the SMC91C94 and the SMC91C111. Say Y if you want it diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index d2767e6584a9..7053026d6c76 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h @@ -55,6 +55,53 @@ #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) +#elif defined(CONFIG_BFIN) + +#define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH + +# if defined (CONFIG_BFIN561_EZKIT) +#define SMC_CAN_USE_8BIT 0 +#define SMC_CAN_USE_16BIT 1 +#define SMC_CAN_USE_32BIT 1 +#define SMC_IO_SHIFT 0 +#define SMC_NOWAIT 1 +#define SMC_USE_BFIN_DMA 0 + + +#define SMC_inw(a, r) readw((a) + (r)) +#define SMC_outw(v, a, r) writew(v, (a) + (r)) +#define SMC_inl(a, r) readl((a) + (r)) +#define SMC_outl(v, a, r) writel(v, (a) + (r)) +#define SMC_outsl(a, r, p, l) outsl((unsigned long *)((a) + (r)), p, l) +#define SMC_insl(a, r, p, l) insl ((unsigned long *)((a) + (r)), p, l) +# else +#define SMC_CAN_USE_8BIT 0 +#define SMC_CAN_USE_16BIT 1 +#define SMC_CAN_USE_32BIT 0 +#define SMC_IO_SHIFT 0 +#define SMC_NOWAIT 1 +#define SMC_USE_BFIN_DMA 0 + + +#define SMC_inw(a, r) readw((a) + (r)) +#define SMC_outw(v, a, r) writew(v, (a) + (r)) +#define SMC_outsw(a, r, p, l) outsw((unsigned long *)((a) + (r)), p, l) +#define SMC_insw(a, r, p, l) insw ((unsigned long *)((a) + (r)), p, l) +# endif +/* check if the mac in reg is valid */ +#define SMC_GET_MAC_ADDR(addr) \ + do { \ + unsigned int __v; \ + __v = SMC_inw(ioaddr, ADDR0_REG); \ + addr[0] = __v; addr[1] = __v >> 8; \ + __v = SMC_inw(ioaddr, ADDR1_REG); \ + addr[2] = __v; addr[3] = __v >> 8; \ + __v = SMC_inw(ioaddr, ADDR2_REG); \ + addr[4] = __v; addr[5] = __v >> 8; \ + if (*(u32 *)(&addr[0]) == 0xFFFFFFFF) { \ + random_ether_addr(addr); \ + } \ + } while (0) #elif defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6) /* We can only do 16-bit reads and writes in the static memory space. */ |