diff options
author | Elad Raz | 2016-11-03 09:41:55 +0100 |
---|---|---|
committer | David S. Miller | 2016-11-03 16:21:27 -0400 |
commit | 5e5f89e70b29153cb28011f0cc47984bfcc3bef4 (patch) | |
tree | 9356666d4413cc1c9bb5743bb3690e4253555b82 /drivers/net | |
parent | a799126864986076e576d7bec549ae055eaa4490 (diff) |
mlxsw: pci: Fix the FW ready mask length
The system-status register is actually 16-bit wide and not 8 bit-wide.
Fixes: 233fa44bd67ae ("mlxsw: pci: Implement reset done check")
Signed-off-by: Elad Raz <eladr@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h index 708736f387e2..d147ddd97997 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h @@ -60,7 +60,7 @@ #define MLXSW_PCI_SW_RESET_RST_BIT BIT(0) #define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 5000 #define MLXSW_PCI_FW_READY 0xA1844 -#define MLXSW_PCI_FW_READY_MASK 0xFF +#define MLXSW_PCI_FW_READY_MASK 0xFFFF #define MLXSW_PCI_FW_READY_MAGIC 0x5E #define MLXSW_PCI_DOORBELL_SDQ_OFFSET 0x000 |