diff options
| author | Lukas Wunner | 2016-05-04 16:58:11 -0500 |
|---|---|---|
| committer | Bjorn Helgaas | 2016-05-04 16:58:11 -0500 |
| commit | f8415222837b651902661f12f5760169690f6696 (patch) | |
| tree | 342dc4bcd979af58f5bb5d9f76a63c1771f6084f /drivers/pci | |
| parent | 4d88d5a7bf92e31215543b955b8883dcf6f66c1f (diff) | |
PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit
We cache the PCI_EXP_SLTCAP_HPC bit in pci_dev->is_hotplug_bridge on device
probe, so there's no need to read it again on allocation of port service
devices.
No functional change intended.
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pcie/portdrv_core.c | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 88122dc2e1b1..847f4fdca50c 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -254,7 +254,6 @@ static void cleanup_service_irqs(struct pci_dev *dev) static int get_port_device_capability(struct pci_dev *dev) { int services = 0; - u32 reg32; int cap_mask = 0; int err; @@ -273,19 +272,14 @@ static int get_port_device_capability(struct pci_dev *dev) } /* Hot-Plug Capable */ - if ((cap_mask & PCIE_PORT_SERVICE_HP) && - pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) { - pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); - if (reg32 & PCI_EXP_SLTCAP_HPC) { - services |= PCIE_PORT_SERVICE_HP; - /* - * Disable hot-plug interrupts in case they have been - * enabled by the BIOS and the hot-plug service driver - * is not loaded. - */ - pcie_capability_clear_word(dev, PCI_EXP_SLTCTL, - PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); - } + if ((cap_mask & PCIE_PORT_SERVICE_HP) && dev->is_hotplug_bridge) { + services |= PCIE_PORT_SERVICE_HP; + /* + * Disable hot-plug interrupts in case they have been enabled + * by the BIOS and the hot-plug service driver is not loaded. + */ + pcie_capability_clear_word(dev, PCI_EXP_SLTCTL, + PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); } /* AER capable */ if ((cap_mask & PCIE_PORT_SERVICE_AER) |