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author | Niklas Cassel | 2018-03-28 13:50:13 +0200 |
---|---|---|
committer | Lorenzo Pieralisi | 2018-04-03 12:38:04 +0100 |
commit | fca83058753456528bef62579ae2b50799d7a473 (patch) | |
tree | 4e722d95203314948064aa37141c38a7ee9a5e8e /drivers/pci | |
parent | a2ea8ac4ec72da44e2cf508e6431db0487b26893 (diff) |
PCI: endpoint: Handle 64-bit BARs properly
If a 64-bit BAR was set-up, we need to skip a BAR,
since a 64-bit BAR consists of a BAR pair.
We need to check what BAR width the epc->ops->set_bar() specific
implementation actually did set-up, since some drivers, like the
Cadence EP controller, sometimes sets up a 64-bit BAR, even though
a 32-bit BAR was requested.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/endpoint/functions/pci-epf-test.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 91274779e59f..d46e3ebabb8e 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -380,6 +380,13 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) if (bar == test_reg_bar) return ret; } + /* + * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64 + * if the specific implementation required a 64-bit BAR, + * even if we only requested a 32-bit BAR. + */ + if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) + bar++; } return 0; |