diff options
| author | Ilkka Koskinen | 2023-09-13 16:39:38 -0700 |
|---|---|---|
| committer | Will Deacon | 2023-10-05 14:19:24 +0100 |
| commit | 8c282414ca6209977cb6d6cc66470ca2d1e56bf6 (patch) | |
| tree | 144fc9e86a27e2dc1b690b681cd2fa7dc5f5259b /drivers/perf | |
| parent | bfc653aa89cb05796d7b4e046600accb442c9b7a (diff) | |
perf: arm_cspmu: Split 64-bit write to 32-bit writes
Split the 64-bit register accesses if 64-bit access is not supported
by the PMU.
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Reviewed-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230913233941.9814-2-ilkka@os.amperecomputing.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf')
| -rw-r--r-- | drivers/perf/arm_cspmu/arm_cspmu.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c index c59f1e5a35a3..5f4f04135a22 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.c +++ b/drivers/perf/arm_cspmu/arm_cspmu.c @@ -719,7 +719,10 @@ static void arm_cspmu_write_counter(struct perf_event *event, u64 val) if (use_64b_counter_reg(cspmu)) { offset = counter_offset(sizeof(u64), event->hw.idx); - writeq(val, cspmu->base1 + offset); + if (cspmu->has_atomic_dword) + writeq(val, cspmu->base1 + offset); + else + lo_hi_writeq(val, cspmu->base1 + offset); } else { offset = counter_offset(sizeof(u32), event->hw.idx); |