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authorJC Kuo2021-01-20 15:34:03 +0800
committerThierry Reding2021-06-03 14:49:33 +0200
commit23d5ec3f02866be6be3f47eab01771f1cf445a68 (patch)
tree5927ea34b078f7a4dedfdf6f4a9d8cd525678820 /drivers/phy/tegra/xusb.c
parent6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff)
phy: tegra: xusb: Move usb3 port init for Tegra210
The programming sequence in tegra210_usb3_port_enable() is required for both cold boot and SC7 exit, and must be performed only after PEX/SATA UPHY is initialized. Therefore, this commit moves the programming sequence to tegra210_usb3_phy_power_on(). PCIE/SATA phy .power_on() stub will invoke tegra210_usb3_phy_power_on() if the lane is assigned for XUSB super-speed. Signed-off-by: JC Kuo <jckuo@nvidia.com> Acked-By: Vinod Koul <vkoul@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/phy/tegra/xusb.c')
-rw-r--r--drivers/phy/tegra/xusb.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c
index 941006f503e4..3110aafa8cf6 100644
--- a/drivers/phy/tegra/xusb.c
+++ b/drivers/phy/tegra/xusb.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
*/
#include <linux/delay.h>
@@ -376,7 +376,7 @@ static int tegra_xusb_setup_pads(struct tegra_xusb_padctl *padctl)
return 0;
}
-static bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane,
+bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane,
const char *function)
{
const char *func = lane->soc->funcs[lane->function];