diff options
| author | Roger Quadros | 2014-03-06 16:38:44 +0200 |
|---|---|---|
| committer | Kishon Vijay Abraham I | 2014-03-09 12:45:11 +0530 |
| commit | 56042e4e975ce7b0817ebc024d02fa96ee01e107 (patch) | |
| tree | e161f81c77811cc4ee757e7d042a6d2374920d94 /drivers/phy | |
| parent | 629138dbaec33cecbb61fda1f5c1f047a1374993 (diff) | |
phy: ti-pipe3: Fix suspend/resume and module reload
Due to Errata i783, SATA breaks if its DPLL is idled. The recommeded
workaround to issue a softreset to the SATA controller doesn't seem to
work. Here we just prevent SATA DPLL from Idling and hence avoid
the issue altogether.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/phy-ti-pipe3.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c index 12cc900491a4..591367654613 100644 --- a/drivers/phy/phy-ti-pipe3.c +++ b/drivers/phy/phy-ti-pipe3.c @@ -238,6 +238,10 @@ static int ti_pipe3_exit(struct phy *x) u32 val; unsigned long timeout; + /* SATA DPLL can't be powered down due to Errata i783 */ + if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata")) + return 0; + /* Put DPLL in IDLE mode */ val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2); val |= PLL_IDLE; |