diff options
author | Mathias Nyman | 2013-06-18 14:33:02 +0300 |
---|---|---|
committer | Linus Walleij | 2013-06-18 17:23:40 +0200 |
commit | a5d811bbf1c6df86cfe23948059ea614554b9f19 (patch) | |
tree | ba9c651bd4f61303bf7a806ababf5b3f79b9f3d0 /drivers/pinctrl/Kconfig | |
parent | 1c851fb189152b6572688fda7fc487ade2a4cb8a (diff) |
pinctrl: add Intel BayTrail GPIO/pinctrl support
Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks
of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins.
Supports gpio interrupts and ACPI gpio events
Pins may be muxed to alternate function instead of gpio by firmware.
This driver does not touch the pin muxing and expect firmare
to set pin muxing and pullup/down properties properly.
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/Kconfig')
-rw-r--r-- | drivers/pinctrl/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 269c0406dce4..e01976fb1175 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -58,6 +58,18 @@ config PINCTRL_AT91 help Say Y here to enable the at91 pinctrl driver +config PINCTRL_BAYTRAIL + bool "Intel Baytrail GPIO pin control" + depends on GPIOLIB && ACPI && X86 + select IRQ_DOMAIN + help + driver for memory mapped GPIO functionality on Intel Baytrail + platforms. Supports 3 banks with 102, 28 and 44 gpios. + Most pins are usually muxed to some other functionality by firmware, + so only a small amount is available for gpio use. + + Requires ACPI device enumeration code to set up a platform device. + config PINCTRL_BCM2835 bool select PINMUX |