diff options
| author | Matthew McClintock | 2016-03-23 17:04:58 -0500 |
|---|---|---|
| committer | Linus Walleij | 2016-03-31 11:56:13 +0200 |
| commit | a9b0b1fe9ecc6ca18ee710f23606532d6aafc05e (patch) | |
| tree | 3aa4878cce55149bdbe8729d69bd5a273b806062 /drivers/pinctrl | |
| parent | cdbac7349f978dd3355e04a6724537964d6fdacd (diff) | |
pinctrl: qcom: ipq4019: fix register offsets
For this SoC the register offsets changed from previous versions to be
separated by a larger amount.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Acked-by: Björn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-ipq4019.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c index cb9f16ab3add..b68ae424cee2 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c @@ -254,11 +254,11 @@ DECLARE_QCA_GPIO_PINS(99); qca_mux_##f14 \ }, \ .nfuncs = 15, \ - .ctl_reg = 0x1000 + 0x10 * id, \ - .io_reg = 0x1004 + 0x10 * id, \ - .intr_cfg_reg = 0x1008 + 0x10 * id, \ - .intr_status_reg = 0x100c + 0x10 * id, \ - .intr_target_reg = 0x400 + 0x4 * id, \ + .ctl_reg = 0x0 + 0x1000 * id, \ + .io_reg = 0x4 + 0x1000 * id, \ + .intr_cfg_reg = 0x8 + 0x1000 * id, \ + .intr_status_reg = 0xc + 0x1000 * id, \ + .intr_target_reg = 0x8 + 0x1000 * id, \ .mux_bit = 2, \ .pull_bit = 0, \ .drv_bit = 6, \ |