diff options
| author | Tomas Henzl | 2011-04-29 16:28:30 +0200 |
|---|---|---|
| committer | James Bottomley | 2011-05-01 16:32:23 -0500 |
| commit | 87f76152dfb1bf3de18dc01cf97c70a5c9d2583e (patch) | |
| tree | 6a0b4a19fe3a3c42155f3e07b4a8d91bfa9812c6 /drivers/scsi | |
| parent | 8b7eb86f61a10132aad7f90e89a15dc89e495d9e (diff) | |
[SCSI] arcmsr: simplify assumptions in dma_alloc_coherent()
The code currently computes an offset into a dma_alloc_coherent() area
on the assumption that the alignment is imprecise. In fact, the API
guarantees PAGE_SIZE alignment, so the offset calculation is always
zero: remove it.
[jejb: make description actually descriptive]
Signed-off-by: Tomas henzl <thenzl@redhat.com>
Acked-by: Nick Cheng<nick.cheng@areca.com.tw>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi')
| -rw-r--r-- | drivers/scsi/arcmsr/arcmsr_hba.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c index a47327fe162c..f980600f78a8 100644 --- a/drivers/scsi/arcmsr/arcmsr_hba.c +++ b/drivers/scsi/arcmsr/arcmsr_hba.c @@ -441,10 +441,11 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) struct CommandControlBlock *ccb_tmp; int i = 0, j = 0; dma_addr_t cdb_phyaddr; - unsigned long roundup_ccbsize = 0, offset; + unsigned long roundup_ccbsize; unsigned long max_xfer_len; unsigned long max_sg_entrys; uint32_t firm_config_version; + for (i = 0; i < ARCMSR_MAX_TARGETID; i++) for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) acb->devstate[i][j] = ARECA_RAID_GONE; @@ -454,23 +455,20 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) firm_config_version = acb->firm_cfg_version; if((firm_config_version & 0xFF) >= 3){ max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ - max_sg_entrys = (max_xfer_len/4096); + max_sg_entrys = (max_xfer_len/4096); } acb->host->max_sectors = max_xfer_len/512; acb->host->sg_tablesize = max_sg_entrys; roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); - acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32; + acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM; dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); if(!dma_coherent){ - printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no); + printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no); return -ENOMEM; } acb->dma_coherent = dma_coherent; acb->dma_coherent_handle = dma_coherent_handle; memset(dma_coherent, 0, acb->uncache_size); - offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent; - dma_coherent_handle = dma_coherent_handle + offset; - dma_coherent = (struct CommandControlBlock *)dma_coherent + offset; ccb_tmp = dma_coherent; acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ |