diff options
| author | Jean Delvare | 2007-10-19 23:22:55 +0200 |
|---|---|---|
| committer | Adrian Bunk | 2007-10-19 23:22:55 +0200 |
| commit | c03983ac9b268d4bbb8c2600baba5798aefa9d5d (patch) | |
| tree | 09c351d4c6174a7b7ed3357d391ff839143160c4 /drivers/scsi | |
| parent | db955170d40601d9925f01712782fbe3ce362b7e (diff) | |
Spelling fix: explicitly
From: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'drivers/scsi')
| -rw-r--r-- | drivers/scsi/sym53c8xx_2/sym_fw2.h | 2 | ||||
| -rw-r--r-- | drivers/scsi/wd33c93.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/scsi/sym53c8xx_2/sym_fw2.h b/drivers/scsi/sym53c8xx_2/sym_fw2.h index 6e5b952312e3..ae1fb179b88e 100644 --- a/drivers/scsi/sym53c8xx_2/sym_fw2.h +++ b/drivers/scsi/sym53c8xx_2/sym_fw2.h @@ -1781,7 +1781,7 @@ static struct SYM_FWB_SCR SYM_FWB_SCR = { * While testing with bogus QUANTUM drives, the C1010 * sometimes raised a spurious phase mismatch with * WSR and the CHMOV(1) triggered another PM. - * Waiting explicitely for the PHASE seemed to avoid + * Waiting explicitly for the PHASE seemed to avoid * the nested phase mismatch. Btw, this didn't happen * using my IBM drives. */ diff --git a/drivers/scsi/wd33c93.h b/drivers/scsi/wd33c93.h index 61ffb860dacc..00123f2383d7 100644 --- a/drivers/scsi/wd33c93.h +++ b/drivers/scsi/wd33c93.h @@ -155,7 +155,7 @@ #define WD33C93_FS_12_15 OWNID_FS_12 #define WD33C93_FS_16_20 OWNID_FS_16 - /* pass input-clock explicitely. accepted mhz values are 8-10,12-20 */ + /* pass input-clock explicitly. accepted mhz values are 8-10,12-20 */ #define WD33C93_FS_MHZ(mhz) (mhz) /* Control register */ |