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authorJason Wang2021-12-11 17:08:45 +0800
committerLi Yang2022-02-18 17:11:21 -0600
commit6385960501d9e0248a8745714674e86bd077e198 (patch)
tree1a735a7464bf4f748f312d6750a35ceadf9ab1d8 /drivers/soc
parentb9abe942cda43a1d46a0fd96efb54f1aa909f757 (diff)
soc: fsl: qe: fix typo in a comment
The double `is' in the comment in line 150 is repeated. Remove one of them from the comment. Also removes a redundant tab in a new line. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/fsl/qe/qe.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 4d38c80f8be8..b3c226eb5292 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -147,7 +147,7 @@ EXPORT_SYMBOL(qe_issue_cmd);
* memory mapped space.
* The BRG clock is the QE clock divided by 2.
* It was set up long ago during the initial boot phase and is
- * is given to us.
+ * given to us.
* Baud rate clocks are zero-based in the driver code (as that maps
* to port numbers). Documentation uses 1-based numbering.
*/
@@ -421,7 +421,7 @@ static void qe_upload_microcode(const void *base,
for (i = 0; i < be32_to_cpu(ucode->count); i++)
iowrite32be(be32_to_cpu(code[i]), &qe_immr->iram.idata);
-
+
/* Set I-RAM Ready Register */
iowrite32be(QE_IRAM_READY, &qe_immr->iram.iready);
}