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authorAdam Ford2021-11-20 13:39:16 -0600
committerShawn Guo2021-11-23 20:20:23 +0800
commit8361b8b29f9389084b679db854cf733375c64763 (patch)
treef1799e9e4e4d1cdd5dfd952ca357763cd5535fdd /drivers/soc
parentf756f435f7dd823f2d4bd593ce1bf3168def1308 (diff)
soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
Enable the vpu-h1 clock when the domain is active because reading or writing to the VPU-H1 IP block cause the system to hang. Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/imx/gpcv2.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index e757044ab751..8176380b02e6 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -734,6 +734,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.map = IMX8MM_VPUH1_A53_DOMAIN,
},
.pgc = BIT(IMX8MM_PGC_VPUH1),
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_DISPMIX] = {