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authorJan Glauber2016-07-23 12:42:51 +0200
committerMark Brown2016-07-24 21:54:29 +0100
commitb9e64763b68dbbf87a54b28edf89cd92c8ef51dd (patch)
tree15f40ec53818b06d9b000cde89211c101b9202fd /drivers/spi
parent187fc9b37458547e198eaf9af4b33c56999748ad (diff)
spi: octeon: Store system clock freqency in struct octeon_spi
Storing the system clock frequency in struct octeon_spi avoids calling the MIPS specific octeon_get_io_clock_rate() for every transfer. Signed-off-by: Jan Glauber <jglauber@cavium.com> Tested-by: Steven J. Hill <steven.hill@cavium.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-octeon.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/spi/spi-octeon.c b/drivers/spi/spi-octeon.c
index b53ba530a1c8..e72204089a88 100644
--- a/drivers/spi/spi-octeon.c
+++ b/drivers/spi/spi-octeon.c
@@ -30,6 +30,7 @@ struct octeon_spi {
void __iomem *register_base;
u64 last_cfg;
u64 cs_enax;
+ int sys_freq;
};
static void octeon_spi_wait_ready(struct octeon_spi *p)
@@ -53,7 +54,6 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
union cvmx_mpi_cfg mpi_cfg;
union cvmx_mpi_tx mpi_tx;
unsigned int clkdiv;
- unsigned int speed_hz;
int mode;
bool cpha, cpol;
const u8 *tx_buf;
@@ -65,9 +65,7 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
cpha = mode & SPI_CPHA;
cpol = mode & SPI_CPOL;
- speed_hz = xfer->speed_hz;
-
- clkdiv = octeon_get_io_clock_rate() / (2 * speed_hz);
+ clkdiv = p->sys_freq / (2 * xfer->speed_hz);
mpi_cfg.u64 = 0;
@@ -194,6 +192,7 @@ static int octeon_spi_probe(struct platform_device *pdev)
}
p->register_base = reg_base;
+ p->sys_freq = octeon_get_io_clock_rate();
master->num_chipselect = 4;
master->mode_bits = SPI_CPHA |