diff options
author | Huibin Hong | 2017-08-16 10:12:02 +0800 |
---|---|---|
committer | Mark Brown | 2017-08-16 11:58:23 +0100 |
commit | 04b37d2d02c0a5ae2f4e59326ef6deaff18e0456 (patch) | |
tree | 2b8f72c4b5afcc32c9a29b6adb47c31b8dbe4f7a /drivers/spi | |
parent | 6b860e69e873be247d19174ab6b24d0b5741bf8c (diff) |
spi: rockchip: configure CTRLR1 according to size and data frame
CTRLR1 is number of data frames, when rx only.
When data frame is 8 bit, CTRLR1 is len-1.
When data frame is 16 bit, CTRLR1 is (len/2)-1.
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/spi-rockchip.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 474033e2149e..fdcf3076681b 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -568,7 +568,13 @@ static void rockchip_spi_config(struct rockchip_spi *rs) writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); - writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1); + if (rs->n_bytes == 1) + writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1); + else if (rs->n_bytes == 2) + writel_relaxed((rs->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1); + else + writel_relaxed((rs->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1); + writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR); writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); |