diff options
| author | Sowjanya Komatineni | 2019-04-04 17:14:05 -0700 |
|---|---|---|
| committer | Mark Brown | 2019-04-05 10:22:22 +0700 |
| commit | f0a0bc90c6e7060778911c2b55d085105809d6cf (patch) | |
| tree | e02a5753a83665ec5ff20c6532fc66fb69c99308 /drivers/spi | |
| parent | a0253c8fa18129f423c22f175a83d81423e60715 (diff) | |
spi: tegra114: set supported bits per word
Tegra SPI supports 4 through 32 bits per word.
This patch sets bits_per_word_mask accordingly to support transfer
with these bits per word.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-tegra114.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 99019f6d2d84..c2ebf1ae632d 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -1151,6 +1151,7 @@ static int tegra_spi_probe(struct platform_device *pdev) /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); master->setup = tegra_spi_setup; master->transfer_one_message = tegra_spi_transfer_one_message; master->num_chipselect = MAX_CHIP_SELECT; |