diff options
| author | John W. Linville | 2011-05-13 09:23:47 -0400 |
|---|---|---|
| committer | John W. Linville | 2011-05-13 15:05:46 -0400 |
| commit | 1159024d4c0aafecaa0c6635c55153b4b39cc1c8 (patch) | |
| tree | 4705e49f865bebca79c8fea57bc464f033f3548f /drivers/ssb | |
| parent | 6b86bd62a505a4a9739474f00f8088395b7a80ba (diff) | |
ssb: fix pcicore build breakage
drivers/ssb/main.c:1336: error: 'SSB_PCICORE_BCAST_ADDR' undeclared (first use in this function)
drivers/ssb/main.c:1337: error: 'SSB_PCICORE_BCAST_DATA' undeclared (first use in this function)
drivers/ssb/main.c:1349: error: 'struct ssb_pcicore' has no member named 'dev'
Reported-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb')
| -rw-r--r-- | drivers/ssb/main.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c index ee2937c41424..f8a13f863217 100644 --- a/drivers/ssb/main.c +++ b/drivers/ssb/main.c @@ -1332,21 +1332,27 @@ EXPORT_SYMBOL(ssb_bus_powerup); static void ssb_broadcast_value(struct ssb_device *dev, u32 address, u32 data) { +#ifdef CONFIG_SSB_DRIVER_PCICORE /* This is used for both, PCI and ChipCommon core, so be careful. */ BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR); BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA); +#endif - ssb_write32(dev, SSB_PCICORE_BCAST_ADDR, address); - ssb_read32(dev, SSB_PCICORE_BCAST_ADDR); /* flush */ - ssb_write32(dev, SSB_PCICORE_BCAST_DATA, data); - ssb_read32(dev, SSB_PCICORE_BCAST_DATA); /* flush */ + ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address); + ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */ + ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data); + ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */ } void ssb_commit_settings(struct ssb_bus *bus) { struct ssb_device *dev; +#ifdef CONFIG_SSB_DRIVER_PCICORE dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev; +#else + dev = bus->chipco.dev; +#endif if (WARN_ON(!dev)) return; /* This forces an update of the cached registers. */ |