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authorAaron Sierra2014-03-03 19:54:36 -0600
committerGreg Kroah-Hartman2014-03-08 22:24:53 -0800
commit41d3f09913a930369a26616eedc02339d0455498 (patch)
treeb0124a1ee58d3e35f6bd59ed0465b1cfe0670171 /drivers/tty
parent50825c57ab80ea44cae6bdcd79ead61e3e4e4e4c (diff)
serial: 8250_pci: change BayTrail default uartclk
The Intel BayTrail HSUART power-on default reference clock is 44.2368 MHz, but 73.728 MHz provides 0% error for additional "conventional" baud rates above 460800 (e.g. 576000, 921600, and 1152000). Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/8250/8250_pci.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index a3dbc4d97fa2..b14bcba96c25 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1401,9 +1401,9 @@ byt_set_termios(struct uart_port *p, struct ktermios *termios,
p->uartclk = 40000000;
break;
default:
- m = 6912;
- n = 15625;
- p->uartclk = 44236800;
+ m = 2304;
+ n = 3125;
+ p->uartclk = 73728000;
}
/* Reset the clock */
@@ -3470,6 +3470,10 @@ static struct pciserial_board pci_boards[] = {
.base_baud = 921600,
.reg_shift = 2,
},
+ /*
+ * Intel BayTrail HSUART reference clock is 44.2368 MHz at power-on,
+ * but is overridden by byt_set_termios.
+ */
[pbn_byt] = {
.flags = FL_BASE0,
.num_ports = 1,