diff options
| author | Tomoya MORINAGA | 2011-02-23 10:03:16 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2011-02-22 17:22:03 -0800 |
| commit | aac6c0b0fd6458f166651fc102695fb8836a4d95 (patch) | |
| tree | 4d6dcf555b22c8d79dbc292eee6f915fbb7b4f82 /drivers/tty | |
| parent | 23877fdc6df3306037d81d2ac71c2d6e26ec08f4 (diff) | |
pch_uart: fix uart clock setting issue
Currently, uart clock is not set correctly.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/tty')
| -rw-r--r-- | drivers/tty/serial/pch_uart.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c index 68855351c76e..189886122516 100644 --- a/drivers/tty/serial/pch_uart.c +++ b/drivers/tty/serial/pch_uart.c @@ -1089,7 +1089,12 @@ static int pch_uart_startup(struct uart_port *port) priv = container_of(port, struct eg20t_port, port); priv->tx_empty = 1; - port->uartclk = priv->base_baud; + + if (port->uartclk) + priv->base_baud = port->uartclk; + else + port->uartclk = priv->base_baud; + pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT); ret = pch_uart_hal_set_line(priv, default_baud, PCH_UART_HAL_PARITY_NONE, PCH_UART_HAL_8BIT, |