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authorRobert Jarzmik2009-04-21 20:41:03 -0700
committerGreg Kroah-Hartman2009-06-15 21:44:42 -0700
commit367815eea4e483d9c3630f69ae0a57e1e32a92b0 (patch)
tree6f4031e06ab7bb589452fb31291eb2167796ff6c /drivers/usb/gadget/pxa27x_udc.h
parent9f5351b743716c796d13235651699fb4ec7aa64f (diff)
USB: pxa27x_udc: single-thread setup requests
Since the PXA 27x UDC automatically ACK's some control packets such as SET_INTERFACE, the gadgets may not get a chance to process the request before another control packet is received. The Linux gadgets do not expect to receive setup callbacks out of order. The file storage gadget only saves the "highest" priority request. The PXA27x UDC driver must make sure it only sends one up at a time, allowing the gadget to make changes before continuing. In theory, the host would be NACK'd while the gadget processes the change but the UDC has already ACK'd the request. If another request is sent by the host that is not automatically ACK'd by the UDC, then the throttling happens properly to regain sync. The observed case was the file_storage gadget timing out on a BulkReset request because the SET_INTERFACE was being processed by the gadget. Since SET_INTERFACE is higher priority than BulkReset, the BulkReset was dropped. This was exacerbated by turning on the debug which delayed the fsg signal processing thread. This also fixes the "should never get in WAIT_ACK_SET_CONF_INTERF state here!!!" warning. Reported-by: Vernon Sauder <vernoninhand@gmail.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> index 51790b0..1937d8c 100644
Diffstat (limited to 'drivers/usb/gadget/pxa27x_udc.h')
-rw-r--r--drivers/usb/gadget/pxa27x_udc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/usb/gadget/pxa27x_udc.h b/drivers/usb/gadget/pxa27x_udc.h
index db58125331da..e25225e26586 100644
--- a/drivers/usb/gadget/pxa27x_udc.h
+++ b/drivers/usb/gadget/pxa27x_udc.h
@@ -130,6 +130,8 @@
#define UP2OCR_HXOE (1 << 17) /* Transceiver Output Enable */
#define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */
+#define UDCCSR0_ACM (1 << 9) /* Ack Control Mode */
+#define UDCCSR0_AREN (1 << 8) /* Ack Response Enable */
#define UDCCSR0_SA (1 << 7) /* Setup Active */
#define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */
#define UDCCSR0_FST (1 << 5) /* Force Stall */