diff options
| author | Heiko Stuebner | 2016-10-14 10:47:24 -0700 |
|---|---|---|
| committer | Felipe Balbi | 2016-10-17 12:30:29 +0300 |
| commit | a07ce8d34eb3d9c6cec3aa25f7713e6aafad2260 (patch) | |
| tree | 12aa3b2164b6cfaba84cdaa1d31d4e196ed57a75 /drivers/usb | |
| parent | d889c23ce4e3159e3d737f55f9d686a030a7ba87 (diff) | |
usb: dwc2: Add msleep for host-only
Although a host-only controller should not have any associated delay,
some rockchip SOC platforms will not show the correct host-values of
registers until after a delay.
So add a 50 ms sleep when in host-only mode.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/dwc2/core.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index fa9b26b91507..4c0fa0b17353 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -463,9 +463,18 @@ static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg) */ void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg) { + bool ret; + switch (hsotg->dr_mode) { case USB_DR_MODE_HOST: - dwc2_force_mode(hsotg, true); + ret = dwc2_force_mode(hsotg, true); + /* + * NOTE: This is required for some rockchip soc based + * platforms on their host-only dwc2. + */ + if (!ret) + msleep(50); + break; case USB_DR_MODE_PERIPHERAL: dwc2_force_mode(hsotg, false); |