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authorBjorn Andersson2022-11-10 19:25:06 -0800
committerGeorgi Djakov2022-11-14 15:05:30 +0200
commit4529992c947401adac53111cf15958a7ea97b1ef (patch)
tree6246470f70c42eb596621a08492e0b8541311672 /drivers
parent1498a5a79980fb86458297df2b4aaa9cc56503b3 (diff)
interconnect: qcom: osm-l3: Use platform-independent node ids
The identifiers used for nodes needs to be unique in the running system, but defining them per platform results in a lot of duplicated definitions and prevents us from using generic compatibles. As these identifiers are not exposed outside the kernel, change to use driver-local numbers, picked completely at random. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> Link: https://lore.kernel.org/r/20221111032515.3460-2-quic_bjorande@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/interconnect/qcom/osm-l3.c87
1 files changed, 30 insertions, 57 deletions
diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
index ddbdf0943f94..d23769844419 100644
--- a/drivers/interconnect/qcom/osm-l3.c
+++ b/drivers/interconnect/qcom/osm-l3.c
@@ -74,6 +74,11 @@ struct qcom_osm_l3_desc {
unsigned int reg_perf_state;
};
+enum {
+ OSM_L3_MASTER_NODE = 10000,
+ OSM_L3_SLAVE_NODE,
+};
+
#define DEFINE_QNODE(_name, _id, _buswidth, ...) \
static const struct qcom_osm_l3_node _name = { \
.name = #_name, \
@@ -83,97 +88,65 @@ struct qcom_osm_l3_desc {
.links = { __VA_ARGS__ }, \
}
-DEFINE_QNODE(sdm845_osm_apps_l3, SDM845_MASTER_OSM_L3_APPS, 16, SDM845_SLAVE_OSM_L3);
-DEFINE_QNODE(sdm845_osm_l3, SDM845_SLAVE_OSM_L3, 16);
+DEFINE_QNODE(osm_l3_master, OSM_L3_MASTER_NODE, 16, OSM_L3_SLAVE_NODE);
+DEFINE_QNODE(osm_l3_slave, OSM_L3_SLAVE_NODE, 16);
+
+static const struct qcom_osm_l3_node * const osm_l3_nodes[] = {
+ [MASTER_OSM_L3_APPS] = &osm_l3_master,
+ [SLAVE_OSM_L3] = &osm_l3_slave,
+};
+
+DEFINE_QNODE(epss_l3_master, OSM_L3_MASTER_NODE, 32, OSM_L3_SLAVE_NODE);
+DEFINE_QNODE(epss_l3_slave, OSM_L3_SLAVE_NODE, 32);
-static const struct qcom_osm_l3_node * const sdm845_osm_l3_nodes[] = {
- [MASTER_OSM_L3_APPS] = &sdm845_osm_apps_l3,
- [SLAVE_OSM_L3] = &sdm845_osm_l3,
+static const struct qcom_osm_l3_node * const epss_l3_nodes[] = {
+ [MASTER_EPSS_L3_APPS] = &epss_l3_master,
+ [SLAVE_EPSS_L3_SHARED] = &epss_l3_slave,
};
static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = {
- .nodes = sdm845_osm_l3_nodes,
- .num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes),
+ .nodes = osm_l3_nodes,
+ .num_nodes = ARRAY_SIZE(osm_l3_nodes),
.lut_row_size = OSM_LUT_ROW_SIZE,
.reg_freq_lut = OSM_REG_FREQ_LUT,
.reg_perf_state = OSM_REG_PERF_STATE,
};
-DEFINE_QNODE(sc7180_osm_apps_l3, SC7180_MASTER_OSM_L3_APPS, 16, SC7180_SLAVE_OSM_L3);
-DEFINE_QNODE(sc7180_osm_l3, SC7180_SLAVE_OSM_L3, 16);
-
-static const struct qcom_osm_l3_node * const sc7180_osm_l3_nodes[] = {
- [MASTER_OSM_L3_APPS] = &sc7180_osm_apps_l3,
- [SLAVE_OSM_L3] = &sc7180_osm_l3,
-};
-
static const struct qcom_osm_l3_desc sc7180_icc_osm_l3 = {
- .nodes = sc7180_osm_l3_nodes,
- .num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),
+ .nodes = osm_l3_nodes,
+ .num_nodes = ARRAY_SIZE(osm_l3_nodes),
.lut_row_size = OSM_LUT_ROW_SIZE,
.reg_freq_lut = OSM_REG_FREQ_LUT,
.reg_perf_state = OSM_REG_PERF_STATE,
};
-DEFINE_QNODE(sc7280_epss_apps_l3, SC7280_MASTER_EPSS_L3_APPS, 32, SC7280_SLAVE_EPSS_L3);
-DEFINE_QNODE(sc7280_epss_l3, SC7280_SLAVE_EPSS_L3, 32);
-
-static const struct qcom_osm_l3_node * const sc7280_epss_l3_nodes[] = {
- [MASTER_EPSS_L3_APPS] = &sc7280_epss_apps_l3,
- [SLAVE_EPSS_L3_SHARED] = &sc7280_epss_l3,
-};
-
static const struct qcom_osm_l3_desc sc7280_icc_epss_l3 = {
- .nodes = sc7280_epss_l3_nodes,
- .num_nodes = ARRAY_SIZE(sc7280_epss_l3_nodes),
+ .nodes = epss_l3_nodes,
+ .num_nodes = ARRAY_SIZE(epss_l3_nodes),
.lut_row_size = EPSS_LUT_ROW_SIZE,
.reg_freq_lut = EPSS_REG_FREQ_LUT,
.reg_perf_state = EPSS_REG_PERF_STATE,
};
-DEFINE_QNODE(sc8180x_osm_apps_l3, SC8180X_MASTER_OSM_L3_APPS, 32, SC8180X_SLAVE_OSM_L3);
-DEFINE_QNODE(sc8180x_osm_l3, SC8180X_SLAVE_OSM_L3, 32);
-
-static const struct qcom_osm_l3_node * const sc8180x_osm_l3_nodes[] = {
- [MASTER_OSM_L3_APPS] = &sc8180x_osm_apps_l3,
- [SLAVE_OSM_L3] = &sc8180x_osm_l3,
-};
-
static const struct qcom_osm_l3_desc sc8180x_icc_osm_l3 = {
- .nodes = sc8180x_osm_l3_nodes,
- .num_nodes = ARRAY_SIZE(sc8180x_osm_l3_nodes),
+ .nodes = osm_l3_nodes,
+ .num_nodes = ARRAY_SIZE(osm_l3_nodes),
.lut_row_size = OSM_LUT_ROW_SIZE,
.reg_freq_lut = OSM_REG_FREQ_LUT,
.reg_perf_state = OSM_REG_PERF_STATE,
};
-DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3);
-DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32);
-
-static const struct qcom_osm_l3_node * const sm8150_osm_l3_nodes[] = {
- [MASTER_OSM_L3_APPS] = &sm8150_osm_apps_l3,
- [SLAVE_OSM_L3] = &sm8150_osm_l3,
-};
-
static const struct qcom_osm_l3_desc sm8150_icc_osm_l3 = {
- .nodes = sm8150_osm_l3_nodes,
- .num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes),
+ .nodes = osm_l3_nodes,
+ .num_nodes = ARRAY_SIZE(osm_l3_nodes),
.lut_row_size = OSM_LUT_ROW_SIZE,
.reg_freq_lut = OSM_REG_FREQ_LUT,
.reg_perf_state = OSM_REG_PERF_STATE,
};
-DEFINE_QNODE(sm8250_epss_apps_l3, SM8250_MASTER_EPSS_L3_APPS, 32, SM8250_SLAVE_EPSS_L3);
-DEFINE_QNODE(sm8250_epss_l3, SM8250_SLAVE_EPSS_L3, 32);
-
-static const struct qcom_osm_l3_node * const sm8250_epss_l3_nodes[] = {
- [MASTER_EPSS_L3_APPS] = &sm8250_epss_apps_l3,
- [SLAVE_EPSS_L3_SHARED] = &sm8250_epss_l3,
-};
-
static const struct qcom_osm_l3_desc sm8250_icc_epss_l3 = {
- .nodes = sm8250_epss_l3_nodes,
- .num_nodes = ARRAY_SIZE(sm8250_epss_l3_nodes),
+ .nodes = epss_l3_nodes,
+ .num_nodes = ARRAY_SIZE(epss_l3_nodes),
.lut_row_size = EPSS_LUT_ROW_SIZE,
.reg_freq_lut = EPSS_REG_FREQ_LUT,
.reg_perf_state = EPSS_REG_PERF_STATE,