diff options
| author | York Sun | 2015-09-02 11:40:46 -0500 |
|---|---|---|
| committer | Wolfram Sang | 2015-09-03 11:58:42 +0200 |
| commit | 5a73882fd2c3a86b502d54da532d373a1f2db15e (patch) | |
| tree | 10d3276235643ef0d7b8774cb1849c5871c4cf32 /drivers | |
| parent | a05a34e7f6ff4a942186e99932885b10c6bc1d1a (diff) | |
i2c: mux: reg Change ioread endianness for readback
Reading the register (if allowed) after writing is to ensure writing
is completed on a posted bus. The endianness of reading doesn't matter.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/i2c/muxes/i2c-mux-reg.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/i2c/muxes/i2c-mux-reg.c b/drivers/i2c/muxes/i2c-mux-reg.c index 7913d8019bb3..5fbd5bd0878f 100644 --- a/drivers/i2c/muxes/i2c-mux-reg.c +++ b/drivers/i2c/muxes/i2c-mux-reg.c @@ -31,28 +31,28 @@ static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id) if (!mux->data.reg) return -EINVAL; + /* + * Write to the register, followed by a read to ensure the write is + * completed on a "posted" bus, for example PCI or write buffers. + * The endianness of reading doesn't matter and the return data + * is not used. + */ switch (mux->data.reg_size) { case 4: - if (mux->data.little_endian) { + if (mux->data.little_endian) iowrite32(chan_id, mux->data.reg); - if (!mux->data.write_only) - ioread32(mux->data.reg); - } else { + else iowrite32be(chan_id, mux->data.reg); - if (!mux->data.write_only) - ioread32(mux->data.reg); - } + if (!mux->data.write_only) + ioread32(mux->data.reg); break; case 2: - if (mux->data.little_endian) { + if (mux->data.little_endian) iowrite16(chan_id, mux->data.reg); - if (!mux->data.write_only) - ioread16(mux->data.reg); - } else { + else iowrite16be(chan_id, mux->data.reg); - if (!mux->data.write_only) - ioread16be(mux->data.reg); - } + if (!mux->data.write_only) + ioread16(mux->data.reg); break; case 1: iowrite8(chan_id, mux->data.reg); |