diff options
| author | Linus Torvalds | 2014-11-03 21:06:22 -0800 |
|---|---|---|
| committer | Linus Torvalds | 2014-11-03 21:06:22 -0800 |
| commit | 980d0d51b1c9617a472b2c0fcbe33d2d15eadc4c (patch) | |
| tree | 79007bcc72b43a1a2499caa6f57714b0f2699d1c /drivers | |
| parent | f3ed88a6bce69942b44fa7927a92cd52011881d7 (diff) | |
| parent | d90c33818967c5e5371961604ad98b4dea4fa3f4 (diff) | |
Merge tag 'pinctrl-v3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin-control fixes from Linus Walleij:
"This kernel cycle has been calm for both pin control and GPIO so far
but here are three pin control patches for you anyway, only really
dealing with Baytrail:
- Two fixes for the Baytrail driver affecting IRQs and output state
in sysfs
- Use the linux-gpio mailing list also for pinctrl patches"
* tag 'pinctrl-v3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: baytrail: show output gpio state correctly on Intel Baytrail
pinctrl: use linux-gpio mailing list
pinctrl: baytrail: Clear DIRECT_IRQ bit
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/pinctrl-baytrail.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c index e12e5b07f6d7..9dc38140194b 100644 --- a/drivers/pinctrl/pinctrl-baytrail.c +++ b/drivers/pinctrl/pinctrl-baytrail.c @@ -227,10 +227,14 @@ static int byt_irq_type(struct irq_data *d, unsigned type) spin_lock_irqsave(&vg->lock, flags); value = readl(reg); + WARN(value & BYT_DIRECT_IRQ_EN, + "Bad pad config for io mode, force direct_irq_en bit clearing"); + /* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits * are used to indicate high and low level triggering */ - value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL); + value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | BYT_TRIG_NEG | + BYT_TRIG_LVL); switch (type) { case IRQ_TYPE_LEVEL_HIGH: @@ -318,7 +322,7 @@ static int byt_gpio_direction_output(struct gpio_chip *chip, "Potential Error: Setting GPIO with direct_irq_en to output"); reg_val = readl(reg) | BYT_DIR_MASK; - reg_val &= ~BYT_OUTPUT_EN; + reg_val &= ~(BYT_OUTPUT_EN | BYT_INPUT_EN); if (value) writel(reg_val | BYT_LEVEL, reg); |