diff options
author | Ben Skeggs | 2013-12-03 14:10:42 +1000 |
---|---|---|
committer | Ben Skeggs | 2014-01-23 13:39:04 +1000 |
commit | c814a60dbe320a41a0f4fa082815931fac986e93 (patch) | |
tree | ba6a9d1b7fe2a159c85b518ca0d7ea24823e0e46 /drivers | |
parent | 7f39e597726774cb3fee71f4b605a5499f7c3a8a (diff) |
drm/nvc0-/fb: hook up skeleton interrupt handler
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c | 2 |
2 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c index e5fc37c4caac..45470e1f0385 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c @@ -33,6 +33,21 @@ nvc0_fb_memtype_valid(struct nouveau_fb *pfb, u32 tile_flags) return likely((nvc0_pte_storage_type_map[memtype] != 0xff)); } +static void +nvc0_fb_intr(struct nouveau_subdev *subdev) +{ + struct nvc0_fb_priv *priv = (void *)subdev; + u32 intr = nv_rd32(priv, 0x000100); + if (intr & 0x08000000) { + nv_debug(priv, "PFFB intr\n"); + intr &= ~0x08000000; + } + if (intr & 0x00002000) { + nv_debug(priv, "PBFB intr\n"); + intr &= ~0x00002000; + } +} + int nvc0_fb_init(struct nouveau_object *object) { @@ -86,6 +101,7 @@ nvc0_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, return -EFAULT; } + nv_subdev(priv)->intr = nvc0_fb_intr; return 0; } diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c index c02b4763a2d5..34472d317097 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c @@ -32,6 +32,7 @@ nvc0_mc_intr[] = { { 0x00000080, NVDEV_ENGINE_COPY2 }, { 0x00000100, NVDEV_ENGINE_FIFO }, { 0x00001000, NVDEV_ENGINE_GR }, + { 0x00002000, NVDEV_SUBDEV_FB }, { 0x00008000, NVDEV_ENGINE_BSP }, { 0x00040000, NVDEV_SUBDEV_THERM }, { 0x00020000, NVDEV_ENGINE_VP }, @@ -40,6 +41,7 @@ nvc0_mc_intr[] = { { 0x01000000, NVDEV_SUBDEV_PWR }, { 0x02000000, NVDEV_SUBDEV_LTCG }, { 0x04000000, NVDEV_ENGINE_DISP }, + { 0x08000000, NVDEV_SUBDEV_FB }, { 0x10000000, NVDEV_SUBDEV_BUS }, { 0x40000000, NVDEV_SUBDEV_IBUS }, { 0x80000000, NVDEV_ENGINE_SW }, |