diff options
| author | Alex Deucher | 2010-11-16 16:53:14 -0500 |
|---|---|---|
| committer | Dave Airlie | 2010-11-18 14:56:08 +1000 |
| commit | d33ef52d9db8a36900dd53f2e32db9a521ace259 (patch) | |
| tree | ff100aa2020cf5801f8932a9456b16d84b281ee3 /drivers | |
| parent | 21e2eae4daaecf2f2a391e4f4b596c800f198edf (diff) | |
drm/radeon/kms: fix typo in r600 cs checker
Looks like a typo in:
drm/radeon/r600: fix tiling issues in CS checker.
(f30df2fad0c901e74ac9a52a488a54c69a373a41)
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/radeon/r600_cs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 0f90fc3482ce..9bebac1ec006 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -315,7 +315,7 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) if (array_mode == V_0280A0_ARRAY_LINEAR_GENERAL) { /* the initial DDX does bad things with the CB size occasionally */ /* it rounds up height too far for slice tile max but the BO is smaller */ - tmp = (height - 7) * 8 * bpe; + tmp = (height - 7) * pitch * bpe; if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) { dev_warn(p->dev, "%s offset[%d] %d %d %lu too big\n", __func__, i, track->cb_color_bo_offset[i], tmp, radeon_bo_size(track->cb_color_bo[i])); return -EINVAL; |