diff options
| author | Danesh Petigara | 2016-01-07 16:03:33 -0800 |
|---|---|---|
| committer | Tejun Heo | 2016-01-08 11:50:14 -0500 |
| commit | e39b2bb3b72b999a04e8d295882be3255aca5ade (patch) | |
| tree | 03734de006c786e574b97ab5ed6178078ae884c0 /drivers | |
| parent | 6ca92dd7aff899777a3081c5948409f4bdef7d38 (diff) | |
libata: skip debounce delay on link resume
The link resume logic uses a 200msec delay while debouncing
the SControl register. The rationale behind that delay is
to accommodate some PHYs that behave badly if their SStatus/
SControl registers are pounded immediately on resume.
The Broadcom STB SATA PHY does not seem to have this issue.
This patch introduces a new link flag that allows platforms
to skip the debounce delay if it isn't needed.
Signed-off-by: Danesh Petigara <dpetigara@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/ata/ahci_brcmstb.c | 1 | ||||
| -rw-r--r-- | drivers/ata/libata-core.c | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c index f61cbe30786f..b36cae2fd04b 100644 --- a/drivers/ata/ahci_brcmstb.c +++ b/drivers/ata/ahci_brcmstb.c @@ -85,6 +85,7 @@ struct brcm_ahci_priv { static const struct ata_port_info ahci_brcm_port_info = { .flags = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM, + .link_flags = ATA_LFLAG_NO_DB_DELAY, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, .port_ops = &ahci_platform_ops, diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index f5ae6f43b659..cbb74719d2c1 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -3598,7 +3598,8 @@ int sata_link_resume(struct ata_link *link, const unsigned long *params, * immediately after resuming. Delay 200ms before * debouncing. */ - ata_msleep(link->ap, 200); + if (!(link->flags & ATA_LFLAG_NO_DB_DELAY)) + ata_msleep(link->ap, 200); /* is SControl restored correctly? */ if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |