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authorJonathan Cameron2022-05-08 18:56:50 +0100
committerJonathan Cameron2022-06-14 11:53:18 +0100
commitf890aaac771bd015c348eddb967b4027e88344c0 (patch)
treec7dcbb907ebd75fddd6b08a0a09fb9719eb4243e /drivers
parenta3e38a557a54df0edea791d7eb623515bb86e39a (diff)
iio: frequency: admv4420: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: b59c04155901 ("iio: frequency: admv4420.c: Add support for ADMV4420") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-71-jic23@kernel.org
Diffstat (limited to 'drivers')
-rw-r--r--drivers/iio/frequency/admv4420.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/frequency/admv4420.c b/drivers/iio/frequency/admv4420.c
index 51134aee8510..863ba8e98c95 100644
--- a/drivers/iio/frequency/admv4420.c
+++ b/drivers/iio/frequency/admv4420.c
@@ -113,7 +113,7 @@ struct admv4420_state {
struct admv4420_n_counter n_counter;
enum admv4420_mux_sel mux_sel;
struct mutex lock;
- u8 transf_buf[4] ____cacheline_aligned;
+ u8 transf_buf[4] __aligned(IIO_DMA_MINALIGN);
};
static const struct regmap_config admv4420_regmap_config = {