diff options
| author | Jonathan Cameron | 2022-05-08 18:57:09 +0100 |
|---|---|---|
| committer | Jonathan Cameron | 2022-06-14 11:53:19 +0100 |
| commit | faa05ecb1349070d874810e161b653c2220e0006 (patch) | |
| tree | 7c5a356409548e00ad1abbe57d59e9071abf9777 /drivers | |
| parent | 37882314d3bdc2ae775ebb9fa8ed7a94cd1aad61 (diff) | |
iio: resolver: ad2s90: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes tag is probably not where the issue was first introduced, but
is likely to be far beyond the point where anyone considers
backporting this fix.
Fixes: 58f08b0af857 ("staging:iio:resolver:ad2s90 general cleanup")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-90-jic23@kernel.org
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/iio/resolver/ad2s90.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/resolver/ad2s90.c b/drivers/iio/resolver/ad2s90.c index d6a91f137e13..be6836e55376 100644 --- a/drivers/iio/resolver/ad2s90.c +++ b/drivers/iio/resolver/ad2s90.c @@ -24,7 +24,7 @@ struct ad2s90_state { struct mutex lock; /* lock to protect rx buffer */ struct spi_device *sdev; - u8 rx[2] ____cacheline_aligned; + u8 rx[2] __aligned(IIO_DMA_MINALIGN); }; static int ad2s90_read_raw(struct iio_dev *indio_dev, |