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authorSylwester Nawrocki2014-04-15 18:30:20 +0200
committerTomasz Figa2014-05-14 19:40:14 +0200
commit04bc7d96fbbbd7c379a8351db9f2466b47c74ec2 (patch)
treec0f34f4a5699bc99df33b6ba6fe56d5d372b4fab /fs/exportfs
parent42fb57c008406ab667bcc6e3164cee092c6f35e7 (diff)
clk: samsung: exynos4: Use single clock ID for CLK_MDMA gate clocks
Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock defined exactly in same way in documentation. Using different names for these clocks is a bit misleading. Since there is no users of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA has correct clock assigned on Exynos4x12 SoCs. Suggested-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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