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authorPeter Ujfalusi2014-05-07 13:20:47 +0300
committerTero Kristo2014-05-28 13:06:54 +0300
commit9ac33b0ce81fa48dd39e7ddfc1bf4519052181dd (patch)
treeadf61f1b79d26caba94187e200786f92c6290811 /fs/ntfs
parent2d5e447914722f3c79103ad54baa1170661ac553 (diff)
CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)
Audio Tracking Logic is designed to be used by HD Radio applications to synchronize the audio output clocks to the baseband clock. ATL can be also used to track errors between two reference clocks (BWS, AWS) and generate a modulated clock output which averages to some desired frequency. In essence ATL is generating a clock to be used by an audio codec and also to be used by the SoC as MCLK. To be able to integrate the ATL provided clocks to the clock tree we need two types of DT binding: - DT clock nodes to represent the ATL clocks towards the CCF - binding for the ATL IP itself which is going to handle the hw configuration The reason for this type of setup is that ATL itself is a separate device in the SoC, it has it's own address space and clock domain. Other IPs can use the ATL generated clock as their functional clock (McASPs for example) and external components like audio codecs can also use the very same clock as their MCLK. The ATL IP in DRA7 contains 4 ATL instences. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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