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authorSiddha, Suresh B2008-01-30 13:33:43 +0100
committerIngo Molnar2008-01-30 13:33:43 +0100
commit4138cc3418f5eaa7524ff8e927102863f1ba0ea5 (patch)
treeb974b9b392b4cd7263596358dd634b11d7e8f350 /include/asm-mips/mach-jmr3927
parentfbd3bfd87f91e6a454f3f61f67ee745f0cb59aa4 (diff)
x86: set strong uncacheable where UC is really desired
Also use _PAGE_PWT for all the mappings which need uncache mapping. Instead of existing PAT2 which is UC- (and can be overwritten by MTRRs), we now use PAT3 which is strong uncacheable. This makes it consistent with pgprot_noncached() Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-mips/mach-jmr3927')
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