diff options
| author | Nikola Cornij | 2021-04-29 18:11:51 -0400 |
|---|---|---|
| committer | Lyude Paul | 2021-04-29 19:11:27 -0400 |
| commit | 98025a62cb00778a467dbc359d647c9515d51b4e (patch) | |
| tree | 6bb916eb1540b0f4470af0221d5d22daa469d283 /include/drm | |
| parent | 310e506c06e495b8fbe3502c70d896bc5b8b2502 (diff) | |
drm/dp_mst: Use Extended Base Receiver Capability DPCD space
[why]
DP 1.4a spec mandates that if DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is
set, Extended Base Receiver Capability DPCD space must be used. Without
doing that, the three DPCD values that differ will be wrong, leading to
incorrect or limited functionality. MST link rate, for example, could
have a lower value. Also, Synaptics quirk wouldn't work out well when
Extended DPCD was not read, resulting in no DSC for such hubs.
[how]
Modify MST topology manager to use the values from Extended DPCD where
applicable.
To prevent regression on the sources that have a lower maximum link rate
capability than MAX_LINK_RATE from Extended DPCD, have the drivers
supply maximum lane count and rate at initialization time.
This also reverts commit 2dcab875e763 ("Revert drm/dp_mst: Retrieve
extended DPCD caps for topology manager"), brining the change back to the
original commit ad44c03208e4 ("drm/dp_mst: Retrieve extended DPCD caps for
topology manager").
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210429221151.22020-2-nikola.cornij@amd.com
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/drm_dp_mst_helper.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 20dc705642bd..c87a829b6498 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -594,6 +594,14 @@ struct drm_dp_mst_topology_mgr { */ int max_payloads; /** + * @max_lane_count: maximum number of lanes the GPU can drive. + */ + u8 max_lane_count; + /** + * @max_link_rate: maximum link rate per lane GPU can output. + */ + u8 max_link_rate; + /** * @conn_base_id: DRM connector ID this mgr is connected to. Only used * to build the MST connector path value. */ @@ -765,7 +773,9 @@ struct drm_dp_mst_topology_mgr { int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, - int max_payloads, int conn_base_id); + int max_payloads, + u8 max_lane_count, u8 max_link_rate, + int conn_base_id); void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr); |