diff options
| author | Fabrizio Castro | 2018-09-10 15:41:26 +0100 |
|---|---|---|
| committer | Simon Horman | 2018-09-14 15:28:41 +0200 |
| commit | cb391265bca42f17c59d90e842a6bc582e3e2211 (patch) | |
| tree | 79a094bad44dcdb60fd3090e47201c8d366bc496 /include/dt-bindings/power | |
| parent | 2bab3d8012ebc463b899ee2c9292bd9282d75257 (diff) | |
dt-bindings: power: Add r8a774c0 SYSC power domain definitions
This patch adds power domain indices for RZ/G2E.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'include/dt-bindings/power')
| -rw-r--r-- | include/dt-bindings/power/r8a774c0-sysc.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/dt-bindings/power/r8a774c0-sysc.h b/include/dt-bindings/power/r8a774c0-sysc.h new file mode 100644 index 000000000000..9922d4c6f87d --- /dev/null +++ b/include/dt-bindings/power/r8a774c0-sysc.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A774C0_PD_CA53_CPU0 5 +#define R8A774C0_PD_CA53_CPU1 6 +#define R8A774C0_PD_A3VC 14 +#define R8A774C0_PD_3DG_A 17 +#define R8A774C0_PD_3DG_B 18 +#define R8A774C0_PD_CA53_SCU 21 +#define R8A774C0_PD_A2VC1 26 + +/* Always-on power area */ +#define R8A774C0_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ */ |