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authorShawn Guo2018-01-24 19:48:26 +0800
committerShawn Guo2018-02-27 09:19:12 +0800
commita44d1f531a39da8cd6497372e713f5998b2d67af (patch)
treef8dcec7acfd547c9cace2bbbc0351d16c3ae9b4d /include/dt-bindings
parent50fd588ae4a6808d9ecd09c3ffe587e306bfa6a9 (diff)
clk: hi3798cv200: fix define indentation
It's a coding-style fix, which corrects the indentation for all those clock definitions, so that the code looks nicer and new definitions can be added with a recommended indentation. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/histb-clock.h54
1 files changed, 27 insertions, 27 deletions
diff --git a/include/dt-bindings/clock/histb-clock.h b/include/dt-bindings/clock/histb-clock.h
index 067f5e501b0c..eba850ff0017 100644
--- a/include/dt-bindings/clock/histb-clock.h
+++ b/include/dt-bindings/clock/histb-clock.h
@@ -22,18 +22,18 @@
#define HISTB_OSC_CLK 0
#define HISTB_APB_CLK 1
#define HISTB_AHB_CLK 2
-#define HISTB_UART1_CLK 3
-#define HISTB_UART2_CLK 4
-#define HISTB_UART3_CLK 5
-#define HISTB_I2C0_CLK 6
-#define HISTB_I2C1_CLK 7
-#define HISTB_I2C2_CLK 8
-#define HISTB_I2C3_CLK 9
-#define HISTB_I2C4_CLK 10
-#define HISTB_I2C5_CLK 11
-#define HISTB_SPI0_CLK 12
-#define HISTB_SPI1_CLK 13
-#define HISTB_SPI2_CLK 14
+#define HISTB_UART1_CLK 3
+#define HISTB_UART2_CLK 4
+#define HISTB_UART3_CLK 5
+#define HISTB_I2C0_CLK 6
+#define HISTB_I2C1_CLK 7
+#define HISTB_I2C2_CLK 8
+#define HISTB_I2C3_CLK 9
+#define HISTB_I2C4_CLK 10
+#define HISTB_I2C5_CLK 11
+#define HISTB_SPI0_CLK 12
+#define HISTB_SPI1_CLK 13
+#define HISTB_SPI2_CLK 14
#define HISTB_SCI_CLK 15
#define HISTB_FMC_CLK 16
#define HISTB_MMC_BIU_CLK 17
@@ -43,7 +43,7 @@
#define HISTB_SDIO0_BIU_CLK 21
#define HISTB_SDIO0_CIU_CLK 22
#define HISTB_SDIO0_DRV_CLK 23
-#define HISTB_SDIO0_SAMPLE_CLK 24
+#define HISTB_SDIO0_SAMPLE_CLK 24
#define HISTB_PCIE_AUX_CLK 25
#define HISTB_PCIE_PIPE_CLK 26
#define HISTB_PCIE_SYS_CLK 27
@@ -53,21 +53,21 @@
#define HISTB_ETH1_MAC_CLK 31
#define HISTB_ETH1_MACIF_CLK 32
#define HISTB_COMBPHY1_CLK 33
-#define HISTB_USB2_BUS_CLK 34
-#define HISTB_USB2_PHY_CLK 35
-#define HISTB_USB2_UTMI_CLK 36
-#define HISTB_USB2_12M_CLK 37
-#define HISTB_USB2_48M_CLK 38
-#define HISTB_USB2_OTG_UTMI_CLK 39
-#define HISTB_USB2_PHY1_REF_CLK 40
-#define HISTB_USB2_PHY2_REF_CLK 41
+#define HISTB_USB2_BUS_CLK 34
+#define HISTB_USB2_PHY_CLK 35
+#define HISTB_USB2_UTMI_CLK 36
+#define HISTB_USB2_12M_CLK 37
+#define HISTB_USB2_48M_CLK 38
+#define HISTB_USB2_OTG_UTMI_CLK 39
+#define HISTB_USB2_PHY1_REF_CLK 40
+#define HISTB_USB2_PHY2_REF_CLK 41
/* clocks provided by mcu CRG */
-#define HISTB_MCE_CLK 1
-#define HISTB_IR_CLK 2
-#define HISTB_TIMER01_CLK 3
-#define HISTB_LEDC_CLK 4
-#define HISTB_UART0_CLK 5
-#define HISTB_LSADC_CLK 6
+#define HISTB_MCE_CLK 1
+#define HISTB_IR_CLK 2
+#define HISTB_TIMER01_CLK 3
+#define HISTB_LEDC_CLK 4
+#define HISTB_UART0_CLK 5
+#define HISTB_LSADC_CLK 6
#endif /* __DTS_HISTB_CLOCK_H */