diff options
| author | Yong Wu | 2019-08-24 11:01:54 +0800 |
|---|---|---|
| committer | Joerg Roedel | 2019-08-30 15:57:26 +0200 |
| commit | 4c019de653237674d38cf2b3119153b144ffe173 (patch) | |
| tree | bc3fe26f138130a39bbf1aa7f1b593deefb84deb /include/linux/io-pgtable.h | |
| parent | 73d50811bc91d2a173213a78b6b43ac762f6cc54 (diff) | |
iommu/io-pgtable-arm-v7s: Extend to support PA[33:32] for MediaTek
MediaTek extend the arm v7s descriptor to support up to 34 bits PA where
the bit32 and bit33 are encoded in the bit9 and bit4 of the PTE
respectively. Meanwhile the iova still is 32bits.
Regarding whether the pagetable address could be over 4GB, the mt8183
support it while the previous mt8173 don't, thus keep it as is.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/linux/io-pgtable.h')
| -rw-r--r-- | include/linux/io-pgtable.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h index 915fb7303aa3..a2a52c349fe4 100644 --- a/include/linux/io-pgtable.h +++ b/include/linux/io-pgtable.h @@ -65,10 +65,9 @@ struct io_pgtable_cfg { * (unmapped) entries but the hardware might do so anyway, perform * TLB maintenance when mapping as well as when unmapping. * - * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) Set bit 9 in all - * PTEs, for Mediatek IOMMUs which treat it as a 33rd address bit - * when the SoC is in "4GB mode" and they can only access the high - * remap of DRAM (0x1_00000000 to 0x1_ffffffff). + * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend + * to support up to 34 bits PA where the bit32 and bit33 are + * encoded in the bit9 and bit4 of the PTE respectively. * * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs * on unmap, for DMA domains using the flush queue mechanism for |