diff options
| author | Tinghan Shen | 2022-06-01 19:22:01 +0800 |
|---|---|---|
| committer | Lee Jones | 2022-07-19 10:54:39 +0100 |
| commit | 66ee379d743c69c726b61d078119a34d5be96a35 (patch) | |
| tree | e8e0176d8907e2a3c22b9f0d435558f2982e0061 /include/linux/platform_data | |
| parent | 738654be3cf7af4a0a131bd92142db045f0660dc (diff) | |
mfd: cros_ec: Add SCP Core-1 as a new CrOS EC MCU
MT8195 System Companion Processors(SCP) is a dual-core RISC-V MCU.
Add a new CrOS feature ID to represent the SCP's 2nd core.
The 1st core is referred to as 'core 0', and the 2nd core is referred
to as 'core 1'.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220601112201.15510-16-tinghan.shen@mediatek.com
Diffstat (limited to 'include/linux/platform_data')
| -rw-r--r-- | include/linux/platform_data/cros_ec_commands.h | 2 | ||||
| -rw-r--r-- | include/linux/platform_data/cros_ec_proto.h | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index 8cfa8cfca77e..9fbf1c5eb8d3 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -1300,6 +1300,8 @@ enum ec_feature_code { * mux. */ EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, + /* The MCU is a System Companion Processor (SCP) 2nd Core. */ + EC_FEATURE_SCP_C1 = 45, }; #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) diff --git a/include/linux/platform_data/cros_ec_proto.h b/include/linux/platform_data/cros_ec_proto.h index 138fd912c808..da06dc7cf1cb 100644 --- a/include/linux/platform_data/cros_ec_proto.h +++ b/include/linux/platform_data/cros_ec_proto.h @@ -19,6 +19,7 @@ #define CROS_EC_DEV_ISH_NAME "cros_ish" #define CROS_EC_DEV_PD_NAME "cros_pd" #define CROS_EC_DEV_SCP_NAME "cros_scp" +#define CROS_EC_DEV_SCP_C1_NAME "cros_scp_c1" #define CROS_EC_DEV_TP_NAME "cros_tp" /* |