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authorLennert Buytenhek2009-11-24 19:33:52 +0200
committerNicolas Pitre2009-11-27 15:43:21 -0500
commit573a652fb0da50a1ff3fca2c67afd81138fd06d2 (patch)
treee393e667f733db56447c266d45e58accf141894f /include/linux/uts.h
parentedabd38e1a017e922e3e3b485ee3ddb4df433aa4 (diff)
ARM: Add Tauros2 L2 cache controller support
Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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