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author | Heiner Kallweit | 2020-09-27 19:44:29 +0200 |
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committer | David S. Miller | 2020-09-27 13:37:30 -0700 |
commit | 709a16be0593c08190982cfbdca6df95e6d5823b (patch) | |
tree | 048ac7e769ae3de399722f92ddab51ed1db3bc32 /include/net/xfrm.h | |
parent | 307eea32b202864c98d28174c14ddbf5b9367722 (diff) |
r8169: fix RTL8168f/RTL8411 EPHY config
Mistakenly bit 2 was set instead of bit 3 as in the vendor driver.
Fixes: a7a92cf81589 ("r8169: sync PCIe PHY init with vendor driver 8.047.01")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/net/xfrm.h')
0 files changed, 0 insertions, 0 deletions