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authorClaudiu Beznea2022-01-13 16:48:51 +0200
committerNicolas Ferre2022-02-25 12:36:25 +0100
commitdc3005703f8cd893d325081c20b400e08377d9bb (patch)
tree0ed718e79dedef6145232b3da25efed1af00bc1c /include/soc/at91
parente783362eb54cd99b2cac8b3a9aeac942e6f6ac07 (diff)
ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency
Remove CONFIG_SOC_SAMA7 dependency to avoid having #ifdef preprocessor directives in driver code (arch/arm/mach-at91/pm.c). This prepares the code for next commits. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220113144900.906370-2-claudiu.beznea@microchip.com
Diffstat (limited to 'include/soc/at91')
-rw-r--r--include/soc/at91/sama7-ddr.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h
index f6542584ca13..13b47e26cdbe 100644
--- a/include/soc/at91/sama7-ddr.h
+++ b/include/soc/at91/sama7-ddr.h
@@ -11,8 +11,6 @@
#ifndef __SAMA7_DDR_H__
#define __SAMA7_DDR_H__
-#ifdef CONFIG_SOC_SAMA7
-
/* DDR3PHY */
#define DDR3PHY_PIR (0x04) /* DDR3PHY PHY Initialization Register */
#define DDR3PHY_PIR_DLLBYP (1 << 17) /* DLL Bypass */
@@ -75,6 +73,4 @@
#define UDDRC_PCTRL_3 (0x6A0) /* UDDRC Port 3 Control Register */
#define UDDRC_PCTRL_4 (0x750) /* UDDRC Port 4 Control Register */
-#endif /* CONFIG_SOC_SAMA7 */
-
#endif /* __SAMA7_DDR_H__ */